Charge transport characteristics of a high-mobility diketopyrrolopyrrole-based polymer

In this study, we attempt to unveil the charge-transport abnormality of the widely studied diketopyrrolopyrrole (DPP)-based polymers with exceptionally high charge carrier mobility [>5 cm2 V−1 s−1]. Based on the electric field and temperature dependence of the charge-transport characteristics of the field effect transistor (FET) geometry of one of the highly conductive DPP derivatives, namely, (poly[2,5-bis(7-decylnonadecyl)pyrrolo[3,4-c]pyrrole-1,4(2H,5H)-dione-(E)-(1,2-bis(5-(thiophen-2-yl)selenophen-2-yl)ethene) (PDPPDTSE), we show that the high gate–source bias drew the carriers closer to the interface of the semiconductor/dielectric layers where the density of state (DOS) of the charge carrier is significantly broader than the bulk. We argue that the intrinsically narrow DOS in the PDPPDTSE bulk resulted in significantly different charge-transport behavior between the semiconductor bulk and the semiconductor/dielectric interface, which was not visible in the other low-mobility organic semiconductors that contain intrinsically high density of trap states in their bulk. To avoid these charge transport abnormalities, we try to operate the FETs under low gate bias without compromising the accumulated charge carrier density. By carefully employing a thin metal oxide covered with a self-assembled monolayer (SAM) as a dielectric layer, we can demonstrate low-voltage PDPPDTSE FETs with near-ideal performance both in terms of hysteresis-free operation and operating reliability while maintaining a high charge carrier mobility of ∼2.8 cm2 V−1 s−1.